The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 25, 2018
Filed:
Apr. 08, 2016
Universite DE Nice, Nice, FR;
Commissariat a L'energie Atomique ET Aux Energies Alternatives, Paris, FR;
Gilles Fernand Jacquemod, Antibes, FR;
Emeric De Foucauld, Coublevie, FR;
Alexandre Benjamin Fonseca, Seillans, FR;
Yves Leduc, Roquefort-les-Pins, FR;
Philippe Bernard Pierre Lorenzini, Antibes, FR;
UNIVERSITE DE NICE, Nice, FR;
COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES, Paris, FR;
Abstract
A differential-logic logic circuit chained with another differential-logic circuit comprises a first logic cell composed of back-gate transistors, the first cell having a first input for receiving a first input signal and having an output for delivering a first output signal, and a second logic cell complementary to the first cell, composed of back-gate transistors, the second cell having as many inputs as the first cell, each input able to receive an input signal complementary to the respective input signal of the first cell, the second cell having an output for delivering a second output signal complementary to the first output signal of the first cell. The first output signal of the first cell is applied to the back gate of each transistor of the second cell, and the second output signal of the second cell is applied to the back gate of each transistor of the first cell.