The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 25, 2018
Filed:
Nov. 19, 2015
Applicant:
Renesas Electronics Corporation, Tokyo, JP;
Inventors:
Keita Mochizuki, Tokyo, JP;
Kensuke Nakashima, Tokyo, JP;
Takahiro Korenari, Tokyo, JP;
Kouji Nakajima, Tokyo, JP;
Assignee:
RENESAS ELECTRONICS CORPORATION, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02J 7/00 (2006.01); H01L 27/088 (2006.01); H01L 27/02 (2006.01); H01M 10/44 (2006.01); H01L 21/8234 (2006.01);
U.S. Cl.
CPC ...
H02J 7/0026 (2013.01); H01L 27/0207 (2013.01); H01L 27/088 (2013.01); H01M 10/44 (2013.01); H01L 21/823487 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/73257 (2013.01); H02J 7/0031 (2013.01); H03K 2217/0054 (2013.01);
Abstract
To provide a semiconductor product high in versatility. A common drain pad is formed over the surface of a semiconductor chip together with source pads and gate pads of discharging and charging power transistors. Thus, when the semiconductor chip is face-down mounted over a wiring board, not only the source pads and gate pads of the discharging and charging power transistors, but also the common drain pad is electrically coupled to wirings of the wiring board.