The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 25, 2018

Filed:

Sep. 07, 2016
Applicant:

Toshiba Memory Corporation, Minato-ku, JP;

Inventors:

Hiroki Okamoto, Nishinomiya, JP;

Kiyoshi Okuyama, Yokkaichi, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/528 (2006.01); H01L 27/11582 (2017.01); H01L 27/02 (2006.01); H01L 27/092 (2006.01); H01L 27/11565 (2017.01);
U.S. Cl.
CPC ...
H01L 27/11582 (2013.01); H01L 27/0207 (2013.01); H01L 27/092 (2013.01); H01L 27/11565 (2013.01);
Abstract

An integrated circuit device includes a first and a second semiconductor regions, a first electrode provided above the first semiconductor region, a second electrode provided above the second semiconductor region, a first and a second interconnects. The first and the second semiconductor regions are arranged to be separated from each other in a first direction. Longitudinal directions of the first and second semiconductor regions are a second direction. Longitudinal directions of the first and second electrode are a third direction. The first and second interconnects extend in the first direction and are provided in a region including a region directly above the first electrode and a region directly above the second electrode. The first interconnect is connected to the first electrode. The second interconnect is connected to the second electrode.


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