The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 25, 2018

Filed:

Aug. 30, 2017
Applicant:

Semiconductor Components Industries, Llc, Phoenix, AZ (US);

Inventors:

Chun-Li Liu, Scottsdale, AZ (US);

Ali Salih, Mesa, AZ (US);

Balaji Padmanabhan, Tempe, AZ (US);

Mingjiao Liu, Gilbert, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 25/18 (2006.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01); H01L 29/20 (2006.01); H01L 29/16 (2006.01); H01L 23/373 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49575 (2013.01); H01L 23/4952 (2013.01); H01L 23/49524 (2013.01); H01L 23/49562 (2013.01); H01L 23/49861 (2013.01); H01L 24/48 (2013.01); H01L 24/49 (2013.01); H01L 24/73 (2013.01); H01L 25/18 (2013.01); H01L 23/3735 (2013.01); H01L 29/16 (2013.01); H01L 29/2003 (2013.01); H01L 2224/37099 (2013.01); H01L 2224/40105 (2013.01); H01L 2224/40245 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48105 (2013.01); H01L 2224/48145 (2013.01); H01L 2224/48245 (2013.01); H01L 2224/49112 (2013.01); H01L 2224/49176 (2013.01); H01L 2224/49177 (2013.01); H01L 2224/73221 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/1203 (2013.01); H01L 2924/1306 (2013.01);
Abstract

A semiconductor component includes a support having a lead integrally formed thereto. An insulated metal substrate is mounted to a surface of the support and a semiconductor chip is mounted to the insulated metal substrate. A III-N based semiconductor chip is mounted to the insulated metal substrate, where the III-N based semiconductor chip has a gate bond pad, a drain bond pad, and a source bond pad. A silicon based semiconductor chip is mounted to the III-N based semiconductor chip. In accordance with an embodiment the silicon based semiconductor chip includes a device having a gate bond pad, a drain bond pad, and a source bond pad. The drain bond pad of the III-N based semiconductor chip may be bonded to the substrate or to a lead. In accordance with another embodiment, the silicon based semiconductor chip is a diode.


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