Nonvolatile memory device and storage device including nonvolatile memory device

Abstract

A nonvolatile memory device includes a memory cell array, a row decoder circuit, a page buffer circuit, and a control logic circuit. The control logic circuit controls the row decoder circuit and the page buffer circuit to perform: (1) a pre-program of sequentially selecting a plurality of memory blocks and increasing threshold voltages of string selection transistors or ground selection transistors of the selected memory block and (2) after the pre-program is completed, a main program of sequentially selecting the plurality of memory blocks, programming string selection transistors or ground selection transistors of the selected memory block, and performing a verification by using a verification voltage.