The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 25, 2018

Filed:

Oct. 13, 2016
Applicant:

Baidu Usa Llc, Sunnyvale, CA (US);

Inventors:

Wesley Shao, Cupertino, CA (US);

Vivek Surabhi, Sunnyvale, CA (US);

Assignee:

BAIDU USA LLC, Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/38 (2006.01); G06F 13/42 (2006.01); G06F 9/4401 (2018.01); G06F 9/38 (2018.01); G06F 1/14 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4295 (2013.01); G06F 1/14 (2013.01); G06F 9/3814 (2013.01); G06F 9/4406 (2013.01); G06F 2213/0026 (2013.01);
Abstract

In one embodiment, a dedicated time processing device inserted into a peripheral bus coupling or embedded with at least some of the rest of system components (e.g., processor, memory) of a data processing system to synchronize a system clock of the data processing system. The peripheral bus can be a Peripheral Component Interface (PCI) bus, a PCI Express (PCIe) link, a PCI extended (PCI-X) bus, or the like. The time processing device receives high precision time from a high precision time source, such as global positioning system (GPS) time source. The time processing device decodes and processes the received time and stores the time in an internal time register. The time processing device further includes an interface to allow an external component (e.g., a processor) to retrieve with low latency the time stored in the time register for the purpose of synchronizing the system clock.


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