The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 25, 2018

Filed:

Sep. 22, 2016
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Eric Mahurin, Austin, TX (US);

David Hoyle, Austin, TX (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 12/06 (2006.01); G06F 9/30 (2018.01); G06F 9/38 (2018.01); G06F 12/02 (2006.01); G06F 12/1009 (2016.01); H03M 7/30 (2006.01); G06F 13/00 (2006.01); G06F 13/28 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0676 (2013.01); G06F 9/30036 (2013.01); G06F 9/3802 (2013.01); G06F 9/3887 (2013.01); G06F 12/0215 (2013.01); G06F 12/0292 (2013.01); G06F 12/1009 (2013.01); H03M 7/6011 (2013.01); H03M 7/6023 (2013.01); G06F 2212/656 (2013.01);
Abstract

A method for storing data at contiguous memory addresses includes, at a single-instruction-multiple-data (SIMD) processor, executing a parallel-prefix valid count instruction to determine a first offset of a first data vector and to determine a second offset of a second data vector that includes valid data and invalid data. The second offset is based on the first offset and a number of positions in the first data vector that are associated with valid data. The method also includes storing first valid data from the first data vector at a first memory address of a memory and storing second valid data from the second data vector at a particular memory address of the memory. The first memory address is based on the first offset and the particular memory address is based on the second offset.


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