The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 25, 2018
Filed:
Apr. 05, 2016
Xilinx, Inc., San Jose, CA (US);
Heera Nand, Alwar, IN;
Niloy Roy, Hyderabad, IN;
Mahesh Sankroj, Secunderabad, IN;
Siddharth Rele, Navi Mumbai, IN;
Riyas Noorudeen Remla, Singapore, SG;
Rajesh Bansal, Singapore, SG;
Bradley K. Fross, Boulder, CO (US);
XILINX, INC., San Jose, CA (US);
Abstract
Approaches for capturing states of signals of a circuit-under-test are disclosed. A logic analyzer circuit is coupled to the circuit-under-test and is configured to receive a plurality of probe signals and a plurality of trigger signals from the circuit-under-test. The logic analyzer circuit inputs data identifying a subset of the probe signals and a subset of the trigger signals. The logic analyzer circuit selects the subset of trigger signals for input to trigger logic and selects the subset of probe signals in the logic analyzer circuit after the logic analyzer circuit and the circuit-under-test are active. The logic analyzer circuit samples states of the subset of probe signals in response to the trigger logic and stores the sampled states of the subset of probe signals in a memory.