The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 18, 2018
Filed:
Oct. 14, 2015
Chip card module arrangement, chip card arrangement and method for producing a chip card arrangement
Applicant:
Infineon Technologies Ag, Neubiberg, DE;
Inventors:
Frank Pueschner, Kelheim, DE;
Jens Pohl, Bernhardswald, DE;
Thomas Spoettl, Mintraching, DE;
Peter Stampka, Burglengenfeld, DE;
Assignee:
Infineon Technologies AG, Neubiberg, DE;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 23/538 (2006.01); H01L 21/56 (2006.01); H01L 23/31 (2006.01); H01L 23/66 (2006.01); G06K 19/07 (2006.01); G06K 19/077 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5388 (2013.01); G06K 19/072 (2013.01); G06K 19/07747 (2013.01); G06K 19/07754 (2013.01); G06K 19/07784 (2013.01); H01L 21/56 (2013.01); H01L 23/3142 (2013.01); H01L 23/66 (2013.01); H01L 2223/6677 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73204 (2013.01); H01L 2924/181 (2013.01);
Abstract
A chip card module arrangement may include a first surface and a second surface, which are opposite from one another, and a chip receptacle for one or more semiconductor chips on the surfaces. The chip card module arrangement may further include a connecting material receiving area on one of the two surfaces, the connecting material receiving area only taking up a portion of the surface.