The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 18, 2018
Filed:
Dec. 02, 2015
Applicant:
Toshiba Memory Corporation, Minato-ku, JP;
Inventors:
Koichi Nagai, Tokyo, JP;
Yuji Kashiwagi, Odawara, JP;
Assignee:
TOSHIBA MEMORY CORPORATION, Minato-ku, JP;
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/14 (2006.01); G06F 3/06 (2006.01); G06F 1/32 (2006.01); H04L 29/06 (2006.01); H04L 9/08 (2006.01); H04L 9/32 (2006.01);
U.S. Cl.
CPC ...
G06F 12/1408 (2013.01); G06F 1/3275 (2013.01); G06F 1/3287 (2013.01); G06F 3/0622 (2013.01); G06F 3/0629 (2013.01); G06F 3/0688 (2013.01); H04L 9/0822 (2013.01); H04L 9/3228 (2013.01); H04L 63/0428 (2013.01); H04L 63/0457 (2013.01); H04L 63/067 (2013.01); H04L 63/0838 (2013.01); H04L 63/126 (2013.01); G06F 2212/1052 (2013.01); H04L 2463/062 (2013.01); Y02D 10/13 (2018.01); Y02D 10/14 (2018.01); Y02D 10/171 (2018.01);
Abstract
According to one embodiment, a memory device includes: a nonvolatile semiconductor memory; and a controller which controls the semiconductor memory. The controller includes: a first memory which stores a first key; a second memory which stores a second key; a first generator which generates a third key based on a random number; a second generator which generates a fourth key based on the first key and the third key; and an encryptor which encrypts the second key with the third key. The third key and the encrypted second key are stored in a host device enabled to access the memory device.