The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 18, 2018

Filed:

Feb. 28, 2017
Applicant:

Toshiba Memory Corporation, Minato-ku, JP;

Inventors:

Hideki Hayakawa, Kamakura, JP;

Takumi Watanabe, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 13/00 (2006.01); G06F 13/28 (2006.01); G06F 9/26 (2006.01); G06F 9/34 (2018.01); G06F 3/06 (2006.01); G06F 12/02 (2006.01); G06F 12/06 (2006.01); G06F 12/1009 (2016.01); G06F 12/10 (2016.01);
U.S. Cl.
CPC ...
G06F 3/061 (2013.01); G06F 3/0655 (2013.01); G06F 3/0685 (2013.01); G06F 12/0238 (2013.01); G06F 12/0638 (2013.01); G06F 12/1009 (2013.01); G06F 3/0614 (2013.01); G06F 12/10 (2013.01); G06F 2212/205 (2013.01); G06F 2212/7201 (2013.01);
Abstract

According to one embodiment, a memory device includes a nonvolatile memory, a volatile memory, and a controller which writes a first data table including a first data group including a first logical address corresponding to a first physical and a first count value and a second data group including a second logical address corresponding to a second physical address and a second count value, to the volatile memory, reads the first data table when a third logical address is requested to be read, compares the first count value and the second count value with each other, and rewrites the first data group or the second data group to a third data group including a third logical address based on a result of the comparison.


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