The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 11, 2018

Filed:

Nov. 01, 2017
Applicant:

Epistar Corporation, Hsinchu, TW;

Inventors:

Chun-Teng Ko, Hsinchu, TW;

Chao-Hsing Chen, Hsinchu, TW;

Jia-Kuen Wang, Hsinchu, TW;

Yen-Liang Kuo, Hsinchu, TW;

Chih-Hao Chen, Hsinchu, TW;

Wei-Jung Chung, Hsinchu, TW;

Chih-Ming Wang, Hsinchu, TW;

Wei-Chih Peng, Hsinchu, TW;

Schang-Jing Hon, Hsinchu, TW;

Yu-Yao Lin, Hsinchu, TW;

Assignee:

EPISTAR CORPORATION, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 33/22 (2010.01); H01L 33/38 (2010.01); H01L 33/46 (2010.01); H01L 33/62 (2010.01); H01L 33/00 (2010.01); H01L 33/06 (2010.01); H01L 33/30 (2010.01); H01L 33/32 (2010.01);
U.S. Cl.
CPC ...
H01L 33/22 (2013.01); H01L 33/0079 (2013.01); H01L 33/38 (2013.01); H01L 33/46 (2013.01); H01L 33/62 (2013.01); H01L 33/06 (2013.01); H01L 33/30 (2013.01); H01L 33/32 (2013.01);
Abstract

A light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer and an active layer formed therebetween; a surrounding exposed region formed on peripheries of the semiconductor stack, exposing a surface of the first semiconductor layer; a conductive layer formed on the second semiconductor layer, including a first conductive region extending toward and contacting the surface of the first semiconductor layer in the surrounding exposed region; an electrode layer formed on the surrounding exposed region, surrounding the semiconductor stack, contacting the conductive layer and including an electrode pad not overlapping the semiconductor stack; an outside insulating layer covering a portion of the conductive layer and the electrode layer, including a first opening exposing the other portion of the conductive layer; a bonding layer covering the outside insulating layer and electrically connecting to the other portion of the conductive layer through the first opening; and a conductive substrate.


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