The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 11, 2018

Filed:

Dec. 04, 2015
Applicant:

Samsung Electronics Co., Ltd., Gyeonggi-do, KR;

Inventors:

Seong Woon Kim, Gyeonggi-do, KR;

Sung Chul Yoon, Gyeonggi-do, KR;

Sang Hoon Lee, Gyeonggi-do, KR;

Ha Na Yang, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06T 1/60 (2006.01); G06T 1/20 (2006.01); G06T 3/40 (2006.01); G06F 3/06 (2006.01); G09G 5/393 (2006.01); G09G 5/399 (2006.01);
U.S. Cl.
CPC ...
G06T 1/60 (2013.01); G06F 3/0611 (2013.01); G06F 3/0683 (2013.01); G06T 1/20 (2013.01); G06T 3/40 (2013.01); G09G 5/393 (2013.01); G09G 5/399 (2013.01); G09G 2340/00 (2013.01);
Abstract

An image processor, an application processor, a method of operating an image processor, and a chips set of an image processor are provided. The image processor includes a scaler configured to perform scaling on an input image and generate a scaled input image; and a selection circuit configured to transmit the scaled input image to either a low latency memory or a high density memory according to a memory selection signal. The application processor includes a memory configured to store an input image; and an image processor configured to scale the input image, wherein the image processor comprises a scaler configured to perform scaling on the input image and generate a scaled input image and a selection circuit configured to transmit the scaled input image to either a low latency memory or a high density memory according to a memory selection signal.


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