The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 11, 2018

Filed:

Feb. 19, 2018
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Joyce Kwong, Sunnyvale, CA (US);

Clive Bittlestone, Allen, TX (US);

Manish Goel, Plano, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 21/73 (2013.01); G11C 11/419 (2006.01); G11C 29/50 (2006.01); G09C 1/00 (2006.01); H04L 9/32 (2006.01); G11C 29/44 (2006.01);
U.S. Cl.
CPC ...
G06F 21/73 (2013.01); G09C 1/00 (2013.01); G11C 11/419 (2013.01); G11C 29/50012 (2013.01); H04L 9/3278 (2013.01); G11C 2029/4402 (2013.01); G11C 2029/5002 (2013.01);
Abstract

Methods and apparatus for creating a physically unclonable function for SRAM are disclosed. An example method includes after applying a voltage to a memory array: determining a first duration between the applying of the voltage and a first output of a first bit cell, the first output corresponding to a first value stored in the first bit cell, and determining a second duration between the applying of the voltage and a second output of a second bit cell, the second output corresponding to a second value stored in the second bit cell. The example method further includes determining a function based on a comparison of the first duration and the second duration, the function to establish an identification of a circuit that includes the memory array.


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