The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 11, 2018

Filed:

Jun. 03, 2015
Applicant:

Altera Corporation, San Jose, CA (US);

Inventors:

Benjamin Gamsa, Toronto, CA;

Gordon Raymond Chiu, North York, CA;

Assignee:

Altera Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
G06F 17/5054 (2013.01); G06F 17/505 (2013.01); G06F 2217/84 (2013.01);
Abstract

Circuit design computing equipment may perform register retiming operations to improve the performance of a circuit design after having performed placement and routing operations. For example, the circuit design computing equipment may perform register retiming operations that move registers from a first portion of a circuit design that operates in a first clock domain into a synchronization region that separates the first portion of the circuit design from a second portion of the circuit design that operates in a second clock domain that is different than the first clock domain. Performing register retiming operations that move registers into a synchronization region between clock domains may solve the so-called short path—long path problem in which a long path that would benefit from a register retiming operation is coupled in parallel to a short path that has no location to receive a register during the register retiming operation.


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