The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 11, 2018

Filed:

Jun. 12, 2017
Applicants:

Shanghai Tianma Micro-electronics Co., Ltd., Shanghai, CN;

Tianma Micro-electronics Co., Ltd., Shenzhen, CN;

Inventors:

Zhaokeng Cao, Shanghai, CN;

Huijun Jin, Shanghai, CN;

Xiaoye Li, Shanghai, CN;

Huangyao Wu, Xiamen, CN;

Di Zhu, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/041 (2006.01); H01L 27/12 (2006.01); G06F 3/044 (2006.01); G02F 1/1333 (2006.01); G09G 3/36 (2006.01); H01L 33/36 (2010.01); H01L 51/52 (2006.01); H05K 1/02 (2006.01); G02F 1/1362 (2006.01); G02F 1/1368 (2006.01); G02F 1/1343 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0412 (2013.01); G02F 1/13338 (2013.01); G06F 3/044 (2013.01); G09G 3/3677 (2013.01); H01L 27/124 (2013.01); H01L 27/1214 (2013.01); H01L 27/1259 (2013.01); H01L 33/36 (2013.01); H01L 51/5203 (2013.01); H05K 1/0298 (2013.01); G02F 1/1368 (2013.01); G02F 1/13439 (2013.01); G02F 1/133345 (2013.01); G02F 1/134309 (2013.01); G02F 1/136286 (2013.01); G02F 2001/136295 (2013.01); G02F 2201/121 (2013.01); G02F 2201/123 (2013.01); G06F 2203/04105 (2013.01); G09G 2300/0426 (2013.01);
Abstract

The present application provides a display panel. The display panel includes an array substrate which includes a display region and a frame region. The frame region includes a gate circuit drive unit, the gate circuit drive unit comprises a thin film transistor, and the thin film transistor comprises a source, a drain and a gate. The frame region further includes a driving circuit and a first signal lead line, the first signal lead line is arranged on a single layer and arranged on a same layer as the signal transmission wire layer, one end of the first signal lead line is electrically connected to the gate and the other end of the first signal lead line is electrically connected to the driving circuit.


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