The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 04, 2018
Filed:
May. 30, 2017
Applicant:
Sii Semiconductor Corporation, Chiba-shi, Chiba, JP;
Inventors:
Masakazu Sugiura, Chiba, JP;
Toshiyuki Tsuzaki, Chiba, JP;
Yuji Shiine, Chiba, JP;
Manabu Fujimura, Chiba, JP;
Assignee:
ABLIC INC., Chiba, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 1/02 (2006.01); H03F 3/45 (2006.01); H03F 1/08 (2006.01); H03F 3/00 (2006.01);
U.S. Cl.
CPC ...
H03F 3/45977 (2013.01); H03F 1/083 (2013.01); H03F 3/005 (2013.01); H03F 3/45 (2013.01); H03F 3/45475 (2013.01);
Abstract
Provided are an amplifier circuit capable of reducing DC offset voltage without an increase in chip area and degradation in frequency characteristics, and a multipath nested miller amplifier circuit. The amplifier circuit includes a chopper switching circuit, a sampling circuit configured to sample an output signal from the chopper switching circuit, and a holding circuit configured to hold a signal output from the sampling circuit.