The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 04, 2018

Filed:

Jun. 01, 2016
Applicant:

Icepower A/s, Søborg, DK;

Inventors:

Kennet Skov Andersen, Søborg, DK;

Eskil Jørgensen, Vaerløse, DK;

Assignee:

ICEPOWER A/S, Søborg, DK;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/217 (2006.01); H03K 5/151 (2006.01); H03K 17/16 (2006.01);
U.S. Cl.
CPC ...
H03F 3/2171 (2013.01); H03K 5/1515 (2013.01); H03K 17/162 (2013.01);
Abstract

The invention relates to a compensator device for compensating signal dependent delay variations, including dead time and reverse recovery time, causing un-linearity in a Class-D amplifier where the compensator device comprises: a first input terminal for receiving an input pulse width modulated input PWM signal comprising pulses with falling flanks corresponding to a falling level transition and rising flanks corresponding to a rising level transition; and a second input terminal configured to receive the signal provided at an output switching node of a Class-D amplifier; an output terminal for providing a compensated output signal; and controllable delay means configured to receive and delay the pulse modulated input signal, thereby providing a delayed version of the input signal to said output terminal of the compensator device. The compensator device further comprises time measuring means configured for measuring the time between a transition of the signal provided at the output terminal of the compensator device and the corresponding transition of the signal at the output switching node of a Class-D amplifier and based on these measurements providing a control signal to the controllable delay means. An advantageous effect of the present invention is that the rising and falling level transition delays will be substantially similar thus substantially removing non-linearity and obtaining substantially correct pulse widths. The invention further relates to a corresponding method, a driver device and a Class-D amplifier.


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