The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 04, 2018

Filed:

Aug. 31, 2017
Applicants:

Shanghai Tianma Micro-electronics Co., Ltd., Shanghai, CN;

Tianma Micro-electronics Co., Ltd., Shenzhen, CN;

Inventors:

Yong Yuan, Shanghai, CN;

Quanpeng Yu, Shanghai, CN;

Xiaoye Li, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 29/786 (2006.01); G02F 1/1333 (2006.01); G02F 1/1368 (2006.01); G02F 1/1362 (2006.01); G02F 1/1343 (2006.01);
U.S. Cl.
CPC ...
H01L 27/124 (2013.01); G02F 1/133345 (2013.01); H01L 27/1248 (2013.01); H01L 29/78669 (2013.01); H01L 29/78675 (2013.01); G02F 1/1368 (2013.01); G02F 1/13338 (2013.01); G02F 1/136286 (2013.01); G02F 2001/13685 (2013.01); G02F 2001/134372 (2013.01); G02F 2201/121 (2013.01); G02F 2201/123 (2013.01); G02F 2202/103 (2013.01); G02F 2202/104 (2013.01);
Abstract

An array substrate, a display panel and a display device are provided. The array substrate includes: a substrate. A signal transmission line, first and second insulator layers, a pixel electrode layer and a common electrode layer are disposed on the substrate; wherein the signal transmission line, the first insulator layer and the second insulator layer are disposed between the common electrode layer and the pixel electrode layer, the signal transmission line is disposed on the first insulator layer, and the second insulator layer is disposed on the signal transmission line; and wherein a dielectric constant of the first insulator layer is less than or equal to a dielectric constant of the second insulator layer, and the signal transmission line is electrically connected with the common electrode layer. A parasitic capacitance between the signal transmission line and the common electrode layer is reduced in the array substrate.


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