The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 04, 2018

Filed:

May. 10, 2017
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventors:

Sung-Min Hwang, Seoul, KR;

Han-Soo Kim, Suwon-si, KR;

Won-Seok Cho, Suwon-si, KR;

Jae-Hoon Jang, Seongnam-si, KR;

Assignee:

SAMSUNG ELECTRONICS CO., LTD., Suwon-si, Gyeonggi-Do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/11582 (2017.01); H01L 27/11578 (2017.01); H01L 21/265 (2006.01); H01L 21/285 (2006.01); H01L 21/306 (2006.01); H01L 21/768 (2006.01); H01L 29/66 (2006.01); G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11582 (2013.01); H01L 21/265 (2013.01); H01L 21/28518 (2013.01); H01L 21/30604 (2013.01); H01L 21/768 (2013.01); H01L 27/11578 (2013.01); H01L 29/6656 (2013.01); G11C 16/0483 (2013.01);
Abstract

Provided is a vertical non-volatile memory device having a metal source line. The vertical non-volatile memory device includes cell string units that are formed on first portions of a semiconductor substrate and are vertically arranged with respect to a surface of the semiconductor substrate, impurity regions formed on second portions of the semiconductor substrate between the cell string units, conductive lines formed on the impurity regions, and spacers that are formed on the sidewalls of the cell string units and insulate the conductive lines from the cells string units.


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