The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 04, 2018

Filed:

Jun. 22, 2017
Applicant:

SK Hynix Inc., Gyeonggi-do, KR;

Inventor:

Un Sang Lee, Chungcheongbuk-do, KR;

Assignee:

SK Hynix Inc., Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/10 (2006.01); G11C 16/20 (2006.01); G11C 16/14 (2006.01); G11C 16/34 (2006.01); G11C 11/56 (2006.01);
U.S. Cl.
CPC ...
G11C 16/20 (2013.01); G11C 11/5628 (2013.01); G11C 16/102 (2013.01); G11C 16/14 (2013.01); G11C 16/3418 (2013.01); G11C 16/3459 (2013.01); G11C 2211/5648 (2013.01);
Abstract

A semiconductor memory device includes a memory cell array, a peripheral circuit and a control logic. The memory cell array includes a plurality of memory cells each of which stores 2 or more bits of data. The peripheral circuit is configured to perform a program operation for the memory cells in the memory cell array. The control logic is configured to control the peripheral circuit and the memory cell array such that, during a program operation for target memory cells to be programmed among the memory cells, a preprogram for memory cells to be programmed to the highest program state is performed based on a predetermined value, and after the preprogram has been performed, a main program for the target memory cells to be programmed is performed.


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