The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 04, 2018

Filed:

May. 29, 2017
Applicants:

Stmicroelectronics S.r.l., Agrate Brianza, IT;

Stmicroelectronics (Rousset) Sas, Rousset, FR;

Inventors:

Francesca Grande, Syracuse, IT;

Francesco La Rosa, Rousset, FR;

Gianbattista Lo Giudice, Pedara, IT;

Giovanni Matranga, Catania, IT;

Assignees:

STMicroelectronics S.r.l., Agrate Brianza (MB), IT;

STMicroelectronics (Rousset) SAS, Rousset, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01); G11C 16/16 (2006.01); G11C 16/34 (2006.01); G11C 16/26 (2006.01);
U.S. Cl.
CPC ...
G11C 16/16 (2013.01); G11C 16/3445 (2013.01); G11C 16/26 (2013.01);
Abstract

A method can be used for reducing a memory operation time in a non-volatile memory device having a memory array with a number of memory cells. The method includes performing a first execution of the memory operation on a set of memory cells by applying a first biasing configuration, storing information associated to the first biasing configuration, and performing a second execution, subsequent to the first execution, of the memory operation on the same set of memory cells by applying a second biasing configuration that is determined according to the stored information associated to the first biasing configuration.


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