The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 27, 2018
Filed:
Aug. 19, 2015
Applicant:
Infineon Technologies Ag, Neubiberg, DE;
Inventors:
Rene Cordes, Erwitte, DE;
Christoph Koch, Salzkotten, DE;
Michael Larisch, Regensburg, DE;
Sven Schennetten, Balve, DE;
Assignee:
Infineon Technologies AG, Neubiberg, DE;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/20 (2006.01); H05K 5/02 (2006.01); B25J 11/00 (2006.01); G01R 31/26 (2014.01); G01R 31/28 (2006.01); H01L 21/687 (2006.01); H05K 5/00 (2006.01); G01R 31/44 (2006.01);
U.S. Cl.
CPC ...
H05K 5/023 (2013.01); B25J 11/0095 (2013.01); G01R 31/2607 (2013.01); G01R 31/2893 (2013.01); G01R 31/44 (2013.01); H01L 21/68728 (2013.01); H01L 21/68735 (2013.01); H01L 21/68778 (2013.01); H05K 5/0065 (2013.01); H05K 5/0069 (2013.01); H05K 5/0091 (2013.01); H01L 2224/32225 (2013.01);
Abstract
One aspect of the invention relates to a semiconductor module with an outer housing having four side walls, and a circuit carrier, which is mounted on the outer housing and has an upper side and a lower side opposite the upper side. A semiconductor chip is arranged on the upper side and in the outer housing. A first gripping socket, which is formed as an indentation, extends from the outer side of the outer housing into a first of the side walls.