The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 27, 2018

Filed:

Mar. 13, 2017
Applicant:

Oracle International Corporation, Redwood City, CA (US);

Inventors:

Jiangyuan Li, San Jose, CA (US);

Xun Zhang, Westford, MA (US);

Jianghui Su, San Jose, CA (US);

Assignee:

ORACLE INTERNATIONAL CORPORATION, Redwood City, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 12/825 (2013.01); H04L 25/03 (2006.01);
U.S. Cl.
CPC ...
H04L 25/03025 (2013.01); H04L 47/25 (2013.01); H04Q 2213/13363 (2013.01);
Abstract

Embodiments include systems and methods for implementing a multi-rate FIR by using rate-dependent bit stuffing on the cursor, while using rate-independent (e.g., full-rate) spacing on the pre- and post-cursor. For example, in the FIR data path, the cursor bit output is generated using bit stuffing, depending on a selected rate mode (e.g., full-rate, half-rate, quarter-rate, eighth-rate, etc.), but the spacing of the pre-cursor, cursor, and post-cursor are maintained at 1 UI apart (i.e., the full-rate spacing) for all rate modes. Such an approach can appreciably reduce complexity of the logic and can appreciably relieve the critical timing path.


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