The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 27, 2018
Filed:
Jul. 11, 2016
The Governing Council of the University of Toronto, Toronto, CA;
Maxim Integrated Products, Inc., San Jose, CA (US);
Nenad Vukadinovic, Toronto, CA;
Aleksandar Prodic, Toronto, CA;
Cory Brent Arnold, Tempe, AZ (US);
Brett A. Miwa, Wellesley, MA (US);
Michael Warren Baker, Arlington, MA (US);
Maxim Integrated Products, Inc., San Jose, CA (US);
Abstract
In various embodiments described in the present disclosure, various methods and systems are introduced, that may reduce and/or eliminate the voltage spikes on the power switches by avoiding operation at zero-ripple duty ratios. In a first aspect, a method for reducing voltage spikes across switches in a multi-level converter is provided, the method comprising: receiving an error value associated with a difference between a measured output voltage and a reference output voltage; determining a target duty cycle value based at least on a control feedback loop adapted to minimize the error value; if the target duty cycle value is equal or approximately equal to one or more critical duty ratio values, controlling the operation of the multi-level converter to operate the multi-level converter with an averaging sequence, the averaging sequence adapted to, on average, result in, or sufficiently approximate, the one or more critical duty ratio values, but not operate at the one or more critical duty ratio values; and generating one or more pulse-width modulated signals to control the operation of the multi-level converter based on at least one of the target duty cycle and the averaging sequence.