The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 27, 2018

Filed:

Sep. 25, 2017
Applicant:

Abb Schweiz Ag, Baden, CH;

Inventors:

Sven Matthias, Lenzburg, CH;

Charalampos Papadopoulos, Lenzburg, CH;

Chiara Corvasce, Bergdietikon, CH;

Arnost Kopta, Zürich, CH;

Assignee:

ABB Schweiz AG, Baden, CH;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/3213 (2006.01); H01L 29/739 (2006.01); H01L 29/66 (2006.01); H01L 29/06 (2006.01); H01L 29/417 (2006.01); H01L 29/40 (2006.01);
U.S. Cl.
CPC ...
H01L 21/32131 (2013.01); H01L 29/0619 (2013.01); H01L 29/0661 (2013.01); H01L 29/402 (2013.01); H01L 29/41708 (2013.01); H01L 29/66348 (2013.01); H01L 29/7397 (2013.01);
Abstract

The present application contemplates a method for manufacturing a power semiconductor device. The method comprises: providing a wafer of a first conductivity type, the wafer having a first main side and a second main side opposite to the first main side, and the wafer including an active cell area, which extends from the first main side to the second main side, in a central part of the wafer and a termination area surrounding the active cell area in an orthogonal projection onto a plane parallel to the first main side; forming a metallization layer on the first main side to electrically contact the wafer in the active cell area, wherein the surface of the metallization layer, which faces away from the wafer, defines a first plane parallel to the first main side; forming an isolation layer on the first main side in the termination area, wherein the surface of the isolation layer facing away from the wafer defines a second plane parallel to the first main side; after the step of forming the metallization layer and after the step of forming the isolation layer, mounting the wafer with its first main side to a flat surface of a chuck; and thereafter thinning the wafer from its second main side by grinding while pressing the second main side of the wafer onto a grinding wheel by applying a pressure between the chuck and the grinding wheel, wherein the first plane is further away from the wafer than a third plane, which is parallel to the second plane and arranged at a distance of 1 μm from the second plane in a direction towards the wafer.


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