The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 27, 2018
Filed:
Oct. 17, 2017
Array substrate, display panel and display apparatus having the same, and fabricating method thereof
Boe Technology Group Co., Ltd., Beijing, CN;
Beijing Boe Optoelectronics Technology Co., Ltd., Beijing, CN;
Zhiying Bao, Beijing, CN;
Xiaochuan Chen, Beijing, CN;
Wenbo Jiang, Beijing, CN;
Shijun Wang, Beijing, CN;
Lei Wang, Beijing, CN;
Yue Li, Beijing, CN;
Yanna Xue, Beijing, CN;
Zhenhua Lv, Beijing, CN;
Wenjun Xiao, Beijing, CN;
Yong Zhang, Beijing, CN;
BOE TECHNOLOGY GROUP CO., LTD., Beijing, CN;
BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., Beijing, CN;
Abstract
The present application discloses an array substrate comprising a first substrate, a first electrode on the first substrate, a passivation layer on a side of the first electrode distal to the first substrate, the passivation layer comprising a plurality of first vias, each of which corresponds to a different part of the first electrode, an electron emission source layer on a side of the first electrode distal to the first substrate comprising at least one electron emission source in each of the plurality of first vias, and a dielectric layer on a side of the first electrode distal to the first substrate comprising a plurality of dielectric blocks corresponding to the plurality of first vias, at least a portion of each of the plurality of dielectric blocks in each of the plurality of first vias. The at least one electron emission source comprises a first portion having a first end and a second portion having a second end. The first end is in contact with the first electrode, the first portion is within a corresponding one of the plurality of dielectric blocks. The second portion and the second end are outside the corresponding one of the plurality of dielectric blocks.