The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 20, 2018

Filed:

Aug. 15, 2016
Applicant:

Cree Fayetteville, Inc., Fayetteville, AR (US);

Inventors:

Brice McPherson, Fayetteville, AR (US);

Peter Killeen, Fayetteville, AR (US);

Alex Lostetter, Fayetteville, AR (US);

Robert Shaw, Fayetteville, AR (US);

Brandon Passmore, Fayetteville, AR (US);

Jared Hornberger, Fayetteville, AR (US);

Tony M. Berry, Springdale, AR (US);

Assignee:

Cree Fayetteville, Inc., Fayetteville, AR (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 5/00 (2006.01); H05K 1/02 (2006.01); H01L 23/373 (2006.01); H01L 25/07 (2006.01); H01L 23/049 (2006.01); H01L 21/48 (2006.01); H01L 23/367 (2006.01); H05K 5/02 (2006.01); H05K 7/20 (2006.01); H01L 23/15 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H05K 5/0069 (2013.01); H01L 21/4817 (2013.01); H01L 23/049 (2013.01); H01L 23/3675 (2013.01); H01L 23/3735 (2013.01); H01L 25/07 (2013.01); H01L 25/072 (2013.01); H05K 1/0296 (2013.01); H05K 5/0013 (2013.01); H05K 5/0091 (2013.01); H05K 5/0247 (2013.01); H05K 7/20509 (2013.01); H01L 23/15 (2013.01); H01L 23/49838 (2013.01); H01L 23/49861 (2013.01); H01L 2924/0002 (2013.01);
Abstract

A method of making a power module includes providing a base plate defining a topology pattern, providing a power substrate above the base plate, providing at least two power contacts and arranging solder catches in the at least two power contacts, soldering the at least two power contacts to the power substrate utilizing the solder catches, and securing a housing to the power substrate.


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