The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 20, 2018

Filed:

Oct. 06, 2017
Applicant:

Omnivision Technologies, Inc., Santa Clara, CA (US);

Inventors:
Assignee:

OmniVision Technologies, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N 5/359 (2011.01); H04N 5/3745 (2011.01); H04N 5/355 (2011.01); H04N 5/353 (2011.01); H01L 27/146 (2006.01); H04N 5/235 (2006.01);
U.S. Cl.
CPC ...
H04N 5/3591 (2013.01); H01L 27/14609 (2013.01); H01L 27/14641 (2013.01); H01L 27/14643 (2013.01); H01L 27/14654 (2013.01); H04N 5/2355 (2013.01); H04N 5/3535 (2013.01); H04N 5/35554 (2013.01); H04N 5/37452 (2013.01); H04N 5/37457 (2013.01);
Abstract

Apparatuses and methods for a skimming photodiode with high dynamic range (HDR) and reduced Light Emitting Diode (LED) flicker in imaging system are disclosed herein. A voltage generator provides a transfer gate voltage to a transfer transistor. The transfer gate voltage is a voltage selected one of a transfer-on, a transfer-off, and a skimming voltage. The transfer transistor transfers charges generated on a Complementary Metal-Oxide-Semiconductor (CMOS) photodiode (PD) to a floating diffusion (FD). The voltage on transfer gate controls the amount of the charges that can be transferred from the PD to the FD. A reset transistor precharges the PD and FD to an AVDD. A first enable transistor controls the amount of charges transferred from the FD to a first capacitor. A second enable transistor controls the amount of charges transferred from the FD to a second capacitor. The first and second enable transistors receive their individual periodical control pulses once activated. Charges collected on the first and second capacitors are transferred to the FD. A source follower transistor amplifies voltage appeared on the FD. A row select transistor sends the amplified voltage to the bitline for signal readout.


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