The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 20, 2018

Filed:

Oct. 25, 2016
Applicant:

Stmicroelectronics S.r.l., Agrate Brianza, IT;

Inventors:

Francesco Pappalardo, Paterno′, IT;

Giuseppe Notarangelo, Gravina di Catania, IT;

Assignee:

STMICROELECTRONICS S.R.L., Agrate Brianza, IT;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 12/741 (2013.01); H04L 1/00 (2006.01); H04L 29/06 (2006.01); H04W 52/02 (2009.01);
U.S. Cl.
CPC ...
H04L 45/745 (2013.01); H04L 1/0053 (2013.01); H04L 1/0061 (2013.01); H04L 1/0078 (2013.01); H04L 69/22 (2013.01); H04W 52/0229 (2013.01); Y02D 70/00 (2018.01);
Abstract

A receiver circuit extracts data from a serial data signal. The serial data signal contains a data packet having a first format with a first number of bits or a second format with a second number of bits based on a selection signal. The second format comprises the bits of the first format followed by one or more additional bits. The receiver circuit has at least one shift register having a total number of bits equal or greater than the number of bits of the second format and a switching circuit that selectively connects the serial data signal to one of the shift register serial inputs as a function of the selection signal. When the first format is selected and the respective bits received, the bits are stored in given positions of the one or more shift registers. The switching circuit also, when the second format is selected and the respective bits received, stores the bits of the first format included at the beginning of the second format in the same given positions of the one or more shift registers.


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