The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 20, 2018

Filed:

Aug. 24, 2015
Applicant:

Seoul Viosys Co., Ltd., Ansan-si, KR;

Inventors:

Jong Kyun You, Ansan-si, KR;

Da Hye Kim, Ansan-si, KR;

Chang Ik Kim, Ansan-si, KR;

Assignee:

Seoul Viosys Co., Ltd., Ansan-si, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 33/60 (2010.01); H01L 33/62 (2010.01); H01L 33/20 (2010.01); H01L 33/38 (2010.01); H01L 33/40 (2010.01); H01L 33/00 (2010.01); H01L 33/16 (2010.01); H01L 33/44 (2010.01); H01L 33/48 (2010.01); H01L 33/54 (2010.01); H01L 33/22 (2010.01);
U.S. Cl.
CPC ...
H01L 33/405 (2013.01); H01L 33/0079 (2013.01); H01L 33/16 (2013.01); H01L 33/20 (2013.01); H01L 33/38 (2013.01); H01L 33/382 (2013.01); H01L 33/62 (2013.01); H01L 33/22 (2013.01); H01L 2933/0016 (2013.01); H01L 2933/0033 (2013.01); H01L 2933/0066 (2013.01);
Abstract

A light emitting diode includes a support substrate; a light emitting structure including a second semiconductor layer, an active layer, and a first semiconductor layer; at least one groove formed on the lower surface of the light emitting structure; a second electrode located on at least the lower surface of the second semiconductor layer, and electrically connected with the second semiconductor layer; an insulating layer partially covering the second electrode and the lower surface of the light emitting structure, and including at least one opening corresponding to the at least one groove; and a first electrode electrically connected to the first semiconductor layer exposed to the at least one groove, and at least partially covering the insulating layer, wherein the second electrode includes a second contact layer including an ohmic contact layer, and the ohmic contact layer is disposed in the shape of a plurality of islands.


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