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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10134910 B1

PDFFull Text
Date of Patent:
Nov. 20, 2018

Filed:

Nov. 19, 2015

Semiconductor device and production method therefor

Applicant:

Sharp Kabushiki Kaisha, Sakai, Osaka, JP;

Inventors:

Masahiko Suzuki, Sakai, JP;

Hajime Imai, Sakai, JP;

Hisao Ochi, Sakai, JP;

Tetsuo Fujita, Sakai, JP;

Hideki Kitagawa, Sakai, JP;

Tetsuo Kikuchi, Sakai, JP;

Shingo Kawashima, Sakai, JP;

Tohru Daitoh, Sakai, JP;

Assignee:

SHARP KABUSHIKI KAISHA, Sakai, Osaka, JP;

Attorney:

ScienBiziP, P.C.

Primary Examiner:

Andy Huynh

Int. Cl.
CPC ...
H01L 29/10 (2006.01); H01L 29/786 (2006.01); G02F 1/1368 (2006.01); G09F 9/00 (2006.01); G09F 9/30 (2006.01); H01L 21/28 (2006.01); H01L 21/283 (2006.01); H01L 21/304 (2006.01); H01L 23/532 (2006.01); H01L 21/768 (2006.01); H01L 27/12 (2006.01); H01L 29/66 (2006.01); H01L 29/45 (2006.01); G02F 1/1362 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7869 (2013.01); G02F 1/1368 (2013.01); G09F 9/00 (2013.01); G09F 9/30 (2013.01); H01L 21/28 (2013.01); H01L 21/283 (2013.01); H01L 21/304 (2013.01); H01L 21/768 (2013.01); H01L 23/532 (2013.01); H01L 27/124 (2013.01); H01L 27/1225 (2013.01); H01L 27/1262 (2013.01); H01L 29/45 (2013.01); H01L 29/66969 (2013.01); G02F 2001/136295 (2013.01); H01L 2924/0002 (2013.01);
Abstract

A semiconductor device (A) includes: a substrate (); a thin film transistor () whose active layer is an oxide semiconductor layer; at least one metal wiring layer including copper (S,D); a metal oxide film including copper () arranged on an upper surface of the at least one metal wiring layer (S,D); an insulating layer () covering at least one metal wiring layer with the metal oxide film () interposed therebetween; and a conductive layer () in direct contact with a portion of the at least one metal wiring layer, without the metal oxide film () interposed therebetween, in an opening formed in the insulating layer ().

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