The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 20, 2018

Filed:

Mar. 23, 2017
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventor:

Steven Alan Lytle, McKinney, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 27/11 (2006.01); H01L 21/768 (2006.01); H01L 21/283 (2006.01); H01L 21/3205 (2006.01); H01L 29/66 (2006.01); H01L 21/8234 (2006.01); H01L 21/8238 (2006.01); H01L 27/118 (2006.01); H01L 29/06 (2006.01); H01L 27/092 (2006.01); H01L 23/485 (2006.01); H01L 27/02 (2006.01); H01L 23/522 (2006.01); H01L 23/535 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1104 (2013.01); H01L 21/283 (2013.01); H01L 21/32053 (2013.01); H01L 21/7684 (2013.01); H01L 21/76837 (2013.01); H01L 21/76877 (2013.01); H01L 21/76897 (2013.01); H01L 21/8238 (2013.01); H01L 21/823468 (2013.01); H01L 21/823475 (2013.01); H01L 21/823828 (2013.01); H01L 21/823842 (2013.01); H01L 21/823864 (2013.01); H01L 21/823871 (2013.01); H01L 23/485 (2013.01); H01L 23/5226 (2013.01); H01L 23/535 (2013.01); H01L 27/0207 (2013.01); H01L 27/092 (2013.01); H01L 27/1116 (2013.01); H01L 27/11807 (2013.01); H01L 29/0649 (2013.01); H01L 29/665 (2013.01); H01L 29/6653 (2013.01); H01L 29/6656 (2013.01); H01L 29/66515 (2013.01); H01L 29/66545 (2013.01); H01L 29/66606 (2013.01); H01L 21/76831 (2013.01); H01L 2924/0002 (2013.01);
Abstract

An integrated circuit and method includes self-aligned contacts. A gapfill dielectric layer fills spaces between sidewalls of adjacent MOS gates. The gapfill dielectric layer is planarized down to tops of gate structures. A contact pattern is formed that exposes an area for multiple self-aligned contacts. The area overlaps adjacent instances of the gate structures. The gapfill dielectric layer is removed from the area. A contact metal layer is formed in the areas where the gapfill dielectric material has been removed. The contact metal abuts the sidewalls along the height of the sidewalls. The contact metal is planarized down to the tops of the gate structures, forming the self-aligned contacts.


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