The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 20, 2018

Filed:

Jul. 17, 2014
Applicant:

Siemens Ag Oesterreich, Vienna, AT;

Inventors:

Friedrich Eppensteiner, Spitz, AT;

Majid Ghameshlu, Vienna, AT;

Herbert Taucher, Meodling, AT;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 21/75 (2013.01); G06F 13/364 (2006.01); G06F 13/42 (2006.01); G06F 21/76 (2013.01); G06F 21/85 (2013.01);
U.S. Cl.
CPC ...
G06F 21/75 (2013.01); G06F 13/364 (2013.01); G06F 13/4282 (2013.01); G06F 21/76 (2013.01); G06F 21/85 (2013.01);
Abstract

A circuit arrangement and method for securing an integrated electronic circuit against scans of an address space, wherein the circuit arrangement has at least one master unit and at least one slave unit interconnected via a bus system for access of the master unit to the slave unit, and addresses are used from an address space that is allocated and used in accordance with functionalities of the integrated electronic circuit, where a defense slave unit is connected to the bus system, access to unused address regions of the address space are forwarded to the defense slave unit, the access is analyzed and evaluated by the defense slave unit and depending on an analysis result and the respective access type, defensive measures are triggered, such that address space scans are interrupted or a potential scan result is rendered useless in a simple manner.


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