The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 20, 2018

Filed:

Dec. 22, 2017
Applicant:

Avnera Corporation, Beaverton, OR (US);

Inventors:

Garry N. Link, Pacific City, OR (US);

Wai Lee, Portland, OR (US);

Assignee:

Avnera Corporation, Beaverton, OR (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F 3/26 (2006.01); G05F 1/10 (2006.01); G05F 3/02 (2006.01);
U.S. Cl.
CPC ...
G05F 3/262 (2013.01); G05F 1/10 (2013.01); G05F 3/02 (2013.01); G05F 3/26 (2013.01);
Abstract

A circuit can have a low mirror input voltage and fast settling while providing a large current mirror gain. The circuit can include a current source, a first current mirror device having a first transistor and a second transistor and electrically coupled with the current source, a third transistor electrically coupled with the first transistor, a second current mirror device having a fourth transistor and a fifth transistor and electrically coupled between the third transistor and the second transistor, and an output device electrically coupled with the first and second current mirror devices.


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