The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 20, 2018

Filed:

Mar. 14, 2016
Applicant:

Cirrus Logic International Semiconductor Ltd., Edinburgh, GB;

Inventors:

Vamsikrishna Parupalli, Austin, TX (US);

Itisha Tyagi, Austin, TX (US);

Assignee:

Cirrus Logic, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 17/16 (2006.01); G01R 19/10 (2006.01); H03F 3/45 (2006.01); H03F 1/02 (2006.01); H04R 3/00 (2006.01); G01R 15/14 (2006.01);
U.S. Cl.
CPC ...
G01R 19/10 (2013.01); H03F 1/0205 (2013.01); H03F 3/45 (2013.01); H03F 3/45475 (2013.01); H03F 3/45937 (2013.01); G01R 15/14 (2013.01); H03F 2200/171 (2013.01); H03F 2200/462 (2013.01); H03F 2203/45048 (2013.01); H03F 2203/45081 (2013.01); H03F 2203/45101 (2013.01); H04R 3/007 (2013.01);
Abstract

The overall performance of a current sense amplifier system may be improved by increasing the common mode rejection of the system. In particular, improved current sense amplifier systems of this disclosure may be configured to use a first ADC path to measure a current flowing through a device, a second ADC path to measure a common mode value, a memory element to store a calibration value, and a summer block to output a voltage proportional to the measured current through the device by correcting a voltage value output by the first ADC path based on the measured common mode value of the second ADC path and the stored calibration value.


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