The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 13, 2018

Filed:

Jul. 31, 2015
Applicant:

Samsung Electro-mechanics Co., Ltd, Suwon-Si, Gyeonggi-Do, KR;

Inventors:

Jae Hoon Choi, Suwon-Si, KR;

Jung Hyun Park, Suwon-Si, KR;

Yong Ho Baek, Suwon-Si, KR;

Hea Sung Kim, Suwon-Si, KR;

Jung Hyun Cho, Suwon-Si, KR;

Il Jong Seo, Suwon-Si, KR;

Assignee:

Samsung Electro-Mechanics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 3/30 (2006.01); H05K 1/18 (2006.01); H05K 3/00 (2006.01); H05K 3/46 (2006.01);
U.S. Cl.
CPC ...
H05K 1/183 (2013.01); H05K 1/185 (2013.01); H05K 3/306 (2013.01); H05K 3/4697 (2013.01); H05K 3/0097 (2013.01); H05K 3/305 (2013.01); H05K 3/4682 (2013.01); H05K 2201/10015 (2013.01); H05K 2201/10636 (2013.01); H05K 2203/1536 (2013.01); Y02P 70/611 (2015.11);
Abstract

An embedded board includes an insulating layer and an electronic device embedded in the insulating layer. A first circuit pattern is embedded to contact a bottom surface of the insulating layer, and a second circuit pattern protrudes from the bottom surface of the insulating layer. A via is bonded to the device and the second circuit pattern.


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