The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 13, 2018

Filed:

Oct. 13, 2015
Applicant:

Cray Inc., Seattle, WA (US);

Inventors:

Edwin L. Froese, Burnaby, CA;

Eric P. Lundberg, Eau Claire, WI (US);

Igor Gorodetsky, Coquitam, CA;

Howard Pritchard, Santa Fe, NM (US);

Charles Giefer, Seattle, WA (US);

Robert L. Alverson, Seattle, WA (US);

Duncan Roweth, Bristol, GB;

Assignee:

Cray Inc., Seattle, WA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 15/167 (2006.01); H04L 29/08 (2006.01); G06F 8/41 (2018.01); G06F 9/52 (2006.01); G06F 9/54 (2006.01); H04L 12/26 (2006.01); H04L 12/751 (2013.01); H04L 12/715 (2013.01);
U.S. Cl.
CPC ...
H04L 67/10 (2013.01); G06F 8/458 (2013.01); G06F 9/52 (2013.01); G06F 9/524 (2013.01); G06F 9/54 (2013.01); G06F 15/167 (2013.01); H04L 12/2602 (2013.01); H04L 43/02 (2013.01); H04L 45/02 (2013.01); H04L 45/04 (2013.01); H04L 67/2842 (2013.01);
Abstract

An improved method for the prevention of deadlock in a massively parallel processor (MPP) system wherein, prior to a process sending messages to another process running on a remote processor, the process allocates space in a deadlock-avoidance FIFO. The allocated space provides a 'landing zone' for requests that the software process (the application software) will subsequently issue using a remote-memory-access function. In some embodiments, the deadlock-avoidance (DLA) function provides two different deadlock-avoidance schemes: controlled discard and persistent reservation. In some embodiments, the software process determines which scheme will be used at the time the space is allocated.


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