The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 13, 2018

Filed:

Oct. 08, 2012
Applicant:

Institute of Microelectronics, Chinese Academy of Sciences, Beijing, CN;

Inventors:

Huilong Zhu, Poughkeepsie, NY (US);

Qingqing Liang, Lagrangeville, NY (US);

Huicai Zhong, San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 29/10 (2006.01); H01L 29/49 (2006.01); H01L 21/28 (2006.01); H01L 27/11568 (2017.01); H01L 21/8238 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 29/6653 (2013.01); H01L 21/2815 (2013.01); H01L 21/28141 (2013.01); H01L 29/105 (2013.01); H01L 29/4983 (2013.01); H01L 29/66545 (2013.01); H01L 29/66636 (2013.01); H01L 29/66659 (2013.01); H01L 29/66689 (2013.01); H01L 29/7816 (2013.01); H01L 29/7833 (2013.01); H01L 29/7843 (2013.01); H01L 21/28079 (2013.01); H01L 21/823842 (2013.01); H01L 27/11568 (2013.01); H01L 29/66598 (2013.01); H01L 2029/42388 (2013.01);
Abstract

Semiconductor devices and methods of manufacturing the same are provided. In one embodiment, the method may include: forming a first shielding layer on a substrate; forming one of source and drain regions with the first shielding layer as a mask; forming a second shielding layer on the substrate, and removing the first shielding layer; forming a shielding spacer on a sidewall of the second shielding layer; forming the other of the source and drain regions with the second shielding layer and the shielding spacer as a mask; removing at least a portion of the shielding spacer; and forming a gate dielectric layer, and forming a gate conductor as a spacer on a sidewall of the second shielding layer or a possible remaining portion of the shielding spacer.


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