The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 13, 2018
Filed:
Jun. 20, 2017
Applicant:
Globalfoundries Inc., Grand Cayman, KY;
Inventors:
Hoong Shing Wong, Clifton Park, NY (US);
Min-hwa Chi, San Jose, CA (US);
Tae-Hoon Kim, Malta, NY (US);
Assignee:
GLOBALFOUNDRIES INC., Grand Cayman, KY;
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 29/10 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 29/08 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0653 (2013.01); H01L 29/0847 (2013.01); H01L 29/1083 (2013.01); H01L 29/66545 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01);
Abstract
A FinFET has shaped epitaxial structures for the source and drain that are electrically isolated from the substrate. Shaped epitaxial structures in the active region are separated from the substrate in the source and drain regions while those in the channel region remain. The gaps created by the separation in the source and drain are filled with electrically insulating material. Prior to filling the gaps, defects created by the separation may be reduced.