The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 13, 2018

Filed:

Jul. 29, 2016
Applicant:

National Chiao Tung University, Hsinchu, TW;

Inventors:

Steve S. Chung, Hsinchu, TW;

E-Ray Hsieh, Kaohsiung, TW;

Zhi-Hong Huang, Tainan, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 17/18 (2006.01); H01L 27/112 (2006.01); G11C 17/16 (2006.01); H01L 23/525 (2006.01); G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
G11C 17/18 (2013.01); G11C 17/16 (2013.01); H01L 27/11206 (2013.01); G11C 16/0433 (2013.01); H01L 23/5256 (2013.01);
Abstract

One time programming and repeatably random read integrated circuit memory has a storage device that programs the information by using dielectric-fuse mechanism. The main characteristics of dielectric fuse mechanisms is that by applying an electric field on the dielectrics, the ions or atoms in the dielectrics are drifted-out, or the dielectrics are burned-out, that create damage of the dielectric structure in a form of porosity, and the conductivity (resistivity) of tunneling current through the dielectrics changes the state from high conductivity (resistivity) to low conductivity (resistivity). The dielectric fuse mechanism has been integrated in VLSI circuits, completed the validation, and implemented by the fabrication of CMOS process.


Find Patent Forward Citations

Loading…