The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 13, 2018

Filed:

Sep. 02, 2010
Applicants:

Helmut Reinig, Isen, DE;

Soeren Sonntag, Munich, DE;

Inventors:

Helmut Reinig, Isen, DE;

Soeren Sonntag, Munich, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/40 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4022 (2013.01); Y02D 10/14 (2018.01); Y02D 10/151 (2018.01);
Abstract

A circuit arrangement, network-on-chip, and a method for transmitting information are disclosed. In one embodiment, an electrical circuit is provided comprising a plurality of circuit blocks comprising a first circuit block, a second circuit block, and a third circuit block, and a connection structure coupled to the plurality of circuit blocks, wherein the first circuit block is configured to send a request comprising information corresponding to the request and an address onto the connection structure, wherein the second circuit block is configured to initiate a transmission onto the connection structure in response to receiving the request, and wherein the third circuit block is configured to receive the transmission and wherein the address is assigned to the third circuit block.


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