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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10127044 B1

PDFFull Text
Date of Patent:
Nov. 13, 2018

Filed:

Oct. 24, 2014

Bandwidth increase in branch prediction unit and level 1 instruction cache

Applicant:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Inventors:

Douglas Williams, Mountain View, CA (US);

Sahil Arora, Campbell, CA (US);

Nikhil Gupta, Sunnyvale, CA (US);

Wei-Yu Chen, Fremont, CA (US);

Debjit Das Sarma, San Jose, CA (US);

Marius Evers, Sunnyvale, CA (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:

Volpe and Koenig, P.C.

Primary Examiner:

Aimee Li

Assistant Examiner:

Shawn Doman

Int. Cl.
CPC ...
G06F 9/38 (2018.01); G06F 9/30 (2018.01);
U.S. Cl.
CPC ...
G06F 9/3806 (2013.01); G06F 9/30058 (2013.01); G06F 9/3848 (2013.01);
Abstract

A processor, a device, and a non-transitory computer readable medium for performing branch prediction in a processor are presented. The processor includes a front end unit. The front end unit includes a level 1 branch target buffer (BTB), a BTB index predictor (BIP), and a level 1 hash perceptron (HP). The BTB is configured to predict a target address. The BIP is configured to generate a prediction based on a program counter and a global history, wherein the prediction includes a speculative partial target address, a global history value, a global history shift value, and a way prediction. The HP is configured to predict whether a branch instruction is taken or not taken.

Find Patent Forward Citations

Williams, Douglas. (2018). Bandwidth increase in branch prediction unit and level 1 instruction cache (U.S. Patent No. 10127044). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10127044

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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