The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 13, 2018
Filed:
Nov. 14, 2016
Xilinx, Inc., San Jose, CA (US);
Xiaojian Yang, Sunnyvale, CA (US);
Maogang Wang, Fremont, CA (US);
Grigor S. Gasparyan, San Jose, CA (US);
Raoul Badaoui, San Jose, CA (US);
XILINX, INC., San Jose, CA (US);
Abstract
Processing a circuit design that specifies application logic and debugging logic includes partitioning the circuit design. Each partition includes a part of the application logic and a part of the debugging logic, each partition is specified for implementation on a respective IC die, and the circuit design specifies connections between a part of the application logic in one partition and a part of the debugging logic in another partition. The connections between the part of the application logic in the one partition and the part of the debugging logic in the other partition are changed to connections from the part of the application logic in the one partition to a part of the debugging logic in the one partition. The part of the application logic and the part of the debugging logic of each partition are placed and routed on the respective IC die.