The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10126354 B1

PDF
Full Text
Expired
Date of Patent:
Nov. 13, 2018

Filed:

Jun. 28, 2017
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Andreas Kerber, Mount Kisco, NY (US);

Tanya Nigam, Sunnyvale, CA (US);

Fernando Guarin, Millbrook, NY (US);

Assignee:

GLOBALFOUNDRIES INC., Grand Cayman, KY;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/26 (2014.01); G01R 31/28 (2006.01); H01L 27/092 (2006.01); H01L 27/118 (2006.01);
U.S. Cl.
CPC ...
G01R 31/2639 (2013.01); G01R 31/2855 (2013.01); H01L 27/092 (2013.01); H01L 27/11807 (2013.01);
Abstract

CMOS switching devices are connected to testing equipment that applies AC to stress the CMOS switching devices. The testing equipment varies rise and fall times of drain and gate voltages, and varies offsets of the drain and gate voltages of the CMOS switching devices. The amount of hot carrier injection (HCI) within the CMOS switching devices is measured when the rise and fall times of the drain and gate voltages cross over, to establish AC HCI contribution to device degradation of the CMOS switching devices. Further, these methods can correlate the AC HCI contribution of the CMOS switching devices to CMOS logic devices based on ring oscillator (RO) degradation of ROs similarly tested or simulated, to produce AC HCI contribution for the CMOS logic devices.


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