The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 13, 2018

Filed:

Sep. 22, 2015
Applicant:

Panduit Corp., Tinley Park, IL (US);

Inventors:

Masud Bolouri-Saransar, Orland Park, IL (US);

James E. Fabiszak, Darien, IL (US);

Richard A. Rago, New Lenox, IL (US);

Assignee:

Panduit Corp., Tinley Park, IL (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/06 (2006.01); G01R 19/155 (2006.01); G01R 15/12 (2006.01); G01R 31/28 (2006.01); G01R 31/02 (2006.01);
U.S. Cl.
CPC ...
G01R 19/155 (2013.01); G01R 15/12 (2013.01); G01R 31/2829 (2013.01); G01R 31/026 (2013.01);
Abstract

A system for the verification of the absence of voltage includes a first impedance, an amplitude limiter electrically connected to the first impedance, a second impedance electrically connected to the first impedance and the amplitude limiter, a varactor circuit electrically connected to the second impedance, an isolation capacitor electrically connected to the second impedance and varactor circuit, an envelope circuit with a voltage detection circuit connected to the isolation circuit via a buffer, and an RF oscillator. The amplitude limiter configured to limit the voltage applied to the varactor circuit. The RF oscillator configured to interact with the varactor circuit in order to create a modulated circuit for the buffer and envelope circuit. The envelope circuit is configured to demodulate the signal for the voltage detection circuit.


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