The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 06, 2018

Filed:

Oct. 10, 2014
Applicant:

Lockheed Martin Corporation, Bethesda, MD (US);

Inventors:

Stephen Gonya, Endicott, NY (US);

James Sean Eiche, Owego, NY (US);

James Patterson, Owego, NY (US);

Kenneth R. Twigg, Sayre, PA (US);

Assignee:

Lockheed Martin Corporation, Bethesda, MD (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/11 (2006.01); H05K 1/05 (2006.01); H05K 1/09 (2006.01); H05K 13/00 (2006.01); H05K 1/02 (2006.01); H05K 3/06 (2006.01);
U.S. Cl.
CPC ...
H05K 1/0284 (2013.01); H05K 3/06 (2013.01); H05K 2201/0179 (2013.01); H05K 2201/0317 (2013.01); H05K 2201/09872 (2013.01);
Abstract

A method of producing a non-planar conforming circuit on a non-planar surface includes creating a first set of conforming layers. The first set of conforming layers is created by applying an oxide dielectric layer to the surface, applying a conductive material layer to the oxide dielectric layer, applying a resist layer to the conductive material layer, patterning the resist layer according to a desired circuit layout, etching the surface to remove exposed conductive material, and stripping the resist layer. The process may be repeated to form multiple layers of conforming circuits with electrical connections between layers formed by blind microvias. The resulting set of conforming layers can be sealed.


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