The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 06, 2018

Filed:

Nov. 16, 2016
Applicant:

Lg Display Co., Ltd., Seoul, KR;

Inventors:

Kyeongju Moon, Gyeonggi-do, KR;

Soyoung Noh, Gyeonggi-do, KR;

Hyunsoo Shin, Gyeonggi-do, KR;

Wonkyung Kim, Busan, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/786 (2006.01); H01L 27/12 (2006.01); G02F 1/1343 (2006.01); G02F 1/1362 (2006.01); H01L 27/32 (2006.01); G02F 1/1368 (2006.01);
U.S. Cl.
CPC ...
H01L 29/78606 (2013.01); H01L 27/124 (2013.01); H01L 27/127 (2013.01); H01L 27/1222 (2013.01); H01L 27/1225 (2013.01); H01L 29/7869 (2013.01); H01L 29/78633 (2013.01); H01L 29/78675 (2013.01); G02F 1/1368 (2013.01); G02F 1/134309 (2013.01); G02F 1/136286 (2013.01); G02F 2001/134372 (2013.01); G02F 2201/121 (2013.01); H01L 27/3262 (2013.01);
Abstract

A thin film transistor substrate includes a first thin film transistor disposed having a polycrystalline semiconductor layer, a first gate electrode on the polycrystalline semiconductor layer, a first source electrode and a first drain electrode; a first gate insulating layer between the polycrystalline semiconductor layer and the first gate electrode; a second thin film transistor disposed having an oxide semiconductor layer on the first gate electrode, a second gate electrode on the oxide semiconductor layer, a second source electrode and a second drain electrode; an intermediate insulating layer disposed on the first gate electrode and under the oxide semiconductor layer; and a second gate insulating layer on the intermediate insulating layer and under the first source electrode, the first drain electrode and the second gate electrode.


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