The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 06, 2018
Filed:
Dec. 10, 2015
Applicant:
Lapis Semiconductor Co., Ltd., Yokohama, JP;
Inventor:
Hiroyoshi Ichikura, Yokohama, JP;
Assignee:
LAPIS Semiconductor Co., Ltd., Yokohama, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/34 (2006.01); H01L 21/00 (2006.01); H05K 7/16 (2006.01); H01L 23/367 (2006.01); G09G 3/36 (2006.01); G02F 1/1333 (2006.01); H01L 23/00 (2006.01); H01L 23/522 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3677 (2013.01); G02F 1/1333 (2013.01); G09G 3/3648 (2013.01); G09G 3/3696 (2013.01); H01L 24/14 (2013.01); H01L 23/522 (2013.01); H01L 24/16 (2013.01); H01L 2224/14152 (2013.01); H01L 2224/14519 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/16235 (2013.01);
Abstract
A dummy bump electrode for heat-dissipating is provided on a surface of a semiconductor chip. The semiconductor chip is mounted on a wiring substrate. A lead line is formed on the wiring substrate. The heat-dissipating bump electrode and a lead line are connected to each other through a heat dissipation pattern, thereby efficiency of the heat dissipation is improved.