The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 06, 2018

Filed:

May. 26, 2017
Applicant:

Fuji Electric Co., Ltd., Kawasaki, JP;

Inventor:

Kousuke Komatsu, Matsumoto, JP;

Assignee:

FUJI ELECTRIC CO., LTD., Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/06 (2006.01); H01L 23/053 (2006.01); H01L 23/08 (2006.01); H01L 23/13 (2006.01); H01L 23/14 (2006.01); H01L 23/48 (2006.01); H01L 23/492 (2006.01); H01L 23/495 (2006.01);
U.S. Cl.
CPC ...
H01L 23/053 (2013.01); H01L 23/08 (2013.01); H01L 23/13 (2013.01); H01L 23/14 (2013.01); H01L 23/481 (2013.01); H01L 23/492 (2013.01); H01L 23/4951 (2013.01); H01L 2224/01 (2013.01);
Abstract

A semiconductor device includes a box-shaped casing including a ceiling wall with a first window, a semiconductor chip having an output electrode and assembled in the casing, a first conductive block disposed in the casing, and a first connection terminal being bent so as to implement an elongated U-shape. The semiconductor device is adapted for electrical connection to a circuit board having a first land. The circuit board is placed on the ceiling wall. The first window is at a position corresponding to the first land. A lower end of the first conductive block is connected to a surface of the output electrode and the first connection terminal contacts to the first conductive block.


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